Delta-Connected Cascaded H-Bridge Multilevel Converters

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Delta-Connected Cascaded H-Bridge Multilevel Converters for Large-Scale Photovoltaic Grid Integration

Yu, Yifan; Konstantinou, Georgios; Townsend, Christopher D.; Aguilera, Ricardo P.; Agelidis, Vassilios G. Published in: I E E E Transactions on Industrial Electronics Link to article, DOI: 10.1109/TIE.2016.2645885 Publication date: 2017 Document Version Peer reviewed version Link back to DTU Orbit

Citation (APA): Yu, Y., Konstantinou, G., Townsend, C. D., Aguilera, R. P., & Agelidis, V. G. (2017). Delta-Connected Cascaded H-Bridge Multilevel Converters for Large-Scale Photovoltaic Grid Integration. I E E E Transactions on Industrial Electronics, 64, 8877-8886. https://doi.org/10.1109/TIE.2016.2645885

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2016.2645885, IEEE Transactions on Industrial Electronics IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

Delta-Connected Cascaded H-Bridge Multilevel Converters for Large-Scale Photovoltaic Grid Integration Yifan Yu, Student Member, IEEE, Georgios Konstantinou, Member, IEEE, Christopher D. Townsend, Member, IEEE, Ricardo P. Aguilera, Member, IEEE, and Vassilios G. Agelidis, Fellow Member, IEEE

Abstract—The cascaded H-bridge (CHB) converter is becoming a promising candidate for use in next generation large-scale photovoltaic (PV) power plants. However, solar power generation in the three converter phaselegs can be significantly unbalanced, especially in a large geographically-dispersed plant. The power imbalance between the three phases defines a limit for the injection of balanced three-phase currents to the grid. This paper quantifies the performance of, and experimentally confirms, the recently proposed delta-connected CHB converter for PV applications as an alternative configuration for largescale PV power plants. The required voltage and current overrating for the converter is analytically developed and compared against the star-connected counterpart. It is shown that the delta-connected CHB converter extends the balancing capabilities of the star-connected CHB and can accommodate most imbalance cases with relatively small overrating. Experimental results from a laboratory prototype are provided to validate the operation of the deltaconnected CHB converter under various power imbalance cases. Index Terms—ac-dc power converters, cascaded Hbridge converter, multilevel converter, photovoltaics.

fs Iga , Igb , Igc iga , igb , igc Iba , Icb , Iac iba , icb , iac Ig I0 , i0 , I 0 Lf , Lf (p.u.)

N OMENCLATURE Carrier frequency of phase shift pulse width modulation. Line current vectors. Line currents (instantaneous values). Phase-leg current vectors (∆). Phase-leg currents (instantaneous values) (∆). Line current (rms). Zero-sequence current (current vector, instantaneous value, rms in the ∆). Inductance and per-unit value of three-phase filtering inductors.

Manuscript received May 29, 2016; revised August 8, 2016 and October 5, 2016; accepted November 9, 2016. Y. Yu, and G. Konstantinou, are with the School of Electrical Engineering and Telecommunications, UNSW Australia, Sydney, NSW, Australia, (e-mail: [email protected]). C. D. Townsend is with the University of Newcastle, Newcastle, NSW, Australia. R. Aguilera is with the University of Technology, Sydney, NSW, Australia. V.G. Agelidis is with the Technical University of Denmark, Copenhagen, Denmark.

Pnom pab,bc,ca Vga , Vgb , Vgc vga , vgb , vgc Vgab , Vgbc , Vgca vgab , vgbc , vgca Vg Vab , Vbc , Vca VLab , VLbc , VLca vab , vbc , vca VLab , VLbc , VLca V0 , v 0 , V 0 vdc θY , θ∆ λa , λb , λc λab , λbc , λca

Three-phase nominal power. Instantaneous power generated in phases ab, bc, ca (∆). Grid voltage vectors (line-to-neutral). Grid voltages (line-to-neutral) (instantaneous value). Grid voltage vectors (line-to-line). Grid voltages (line-to-line) (instantaneous value). Grid voltage (line-to-line) (rms). Converter output voltage vectors (∆). Voltages across the filtering inductors Lf (∆). Converter output voltages (instantaneous values) (∆). Inductor voltage vectors (∆). Zero-sequence voltage (voltage vector - instantaneous value - rms). dc-side voltage of H-bridges. Phase angle of the zero-sequence voltage vector (Y and ∆). Power generation ratios (Y). Power generation ratios (∆).

I. I NTRODUCTION

T

HE cascaded H-Bridge (CHB) converter is considered one of the most suitable configurations to be used in next-generation large-scale photovoltaic (PV) power plants, attracting significant research interest both from the technical and financial perspective [1]–[22]. With multilevel waveform synthesis, the switching frequency at the device level can be greatly reduced while the converter still achieves excellent harmonic performance [23]. Multiple H-bridges cascaded in series also enable the converter to be directly connected to medium-voltage (MV) grids without the presence of a bulky and lossy line-frequency transformer. In addition, each Hbridge also operates at low voltage, which effectively reduces PV module mismatch loss [14], [15]. In applications where the CHB converter has achieved commercial success, such as Variable Speed Drives (VSDs) and Static Synchronous Compensators (STATCOMs) [24]– [28], the active or reactive power processed by all of the

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2016.2645885, IEEE Transactions on Industrial Electronics IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

a iga

iac

Lf

vca

vga

vab N

HB

HB

Lf

vgc

Lf

vbc

iba b

vgb

i0

c icb igc

igb PV strings S1

isolated dc-dc converter

S3

vdc C

S2

S4

H-Bridge (HB)

Fig. 1. Three-phase, (2N + 1)-level, delta-connected cascaded Hbridge converter.

H-bridges is more or less equal. The situation is different for PV applications, as PV power generation levels in each bridge are unlikely to be equal, due to non-uniform solar irradiance, partial shading, unequal ambient temperatures, and inconsistent module degradation. The issue is referred to as power imbalance and can further divided into inter-phase and inter-bridge power imbalance [14], [15]. The current work on inter-phase power imbalance [14]–[18] focuses predominantly on the star-connected topology, where the issue is addressed by injection of a zero-sequence voltage into the converter output voltages. Fundamental Frequency Zero-Sequence Injection (FFZSI) method, presented in [14], is able to generate three-phase balanced grid currents in the case of inter-phase power imbalance. However, zero-sequence voltage injection requires higher converter output voltages, which are constrained by the available dc-side capacitor voltages. As a result, the converter reference will saturate with only mild inter-phase power imbalance [14]. Advanced zerosequence voltage injection methods were derived in [14]–[16] to minimize the required converter output voltages extending the range where balance can be achieved. However, even more advanced zero-sequence injection methods cannot cope with severe power imbalance scenarios [15]. Simulations studies for the delta-connected CHB converter have demonstrated its potential to deal with severe inter-phase power imbalance in PV applications [20]–[22]. he contributions of this paper include the comprehensive description of the recently proposed delta-connected CHB converter for large-

scale PV applications (Section II), its control implementation (Section III) and the analytical derivation of its power balancing capabilities also in comparison with the star-connected topology (Section IV). Detailed experimental results under various power imbalance cases are presented in Section V to demonstrate and verify the delta-CHB converter and its power balancing capabilities. II. D ELTA -C ONNECTED CHB C ONVERTER FOR PV A PPLICATIONS Fig. 1 illustrates the layout of a three-phase, (2N + 1)-level, delta-connected CHB converter for large-scale PV plants. As with a star-connected converter [14]–[18], each phase consists of N bridges, each of which is fed by multiple PV strings via independent dc-dc converters. Galvanic isolation can be provided in the dc-dc conversion stage (high-frequency transformers are typically preferred) to isolate PV modules from the grid, because most commercial PV modules are designed to bear less than 1000 V between the active part of the module and the grounded frame [29], although general consensus on the optimal topology does not exist. Under balanced PV generation, the delta connection requires a greater number of bridges cascaded in series than the star connection, to reach the line-to-line grid voltage, thus inevitably increasing the size of the converter. During balanced operation, the power generation level of each of the three phases is equal to the other two. The threephase line currents delivered to the grid (Iga , Igb , Igc in Fig. 2) are balanced with a unity power factor; so are the three-phase phase-leg currents (Iba , Icb , Iac ). The converter is modulated to generate voltage vectors Vab , Vbc , Vca , which are also symmetrical. However, when power generation levels of the three phases become unequal, the three-phase line currents are no longer balanced. To overcome this issue, a zero-sequence current can be used to re-balance the line currents. Fig. 2b shows the phasor diagram for unbalanced power generation. The injected zero-sequence current vector I0 contributes to the power transfer among the three phases. For the case illustrated in Fig. 2b, I0 helps transfer the excessive power in phase ab to phases bc and ca. Since the zero-sequence current only flows within the delta, the three-phase line currents are still balanced. Therefore, viewed from the grid side, the converter produces three-phase balanced line currents, just like the case of equal power generation. The power generation ratios (λab , λbc , λca ) are defined to reflect the actual power generation levels in the three phases [16]: pi , i ∈ {ab, bc, ca}, (1) Pnom /3 where Pnom denotes the three-phase nominal power. Assuming a delta connections, the three-phase grid voltages (line-to-line) can be defined as: √ vgab = 2Vg cos (ωt + π/6), (2a) √ vgbc = 2Vg cos (ωt − π/2), (2b) √ vgca = 2Vg cos (ωt + 5π/6), (2c) λi =

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2016.2645885, IEEE Transactions on Industrial Electronics IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

TABLE I Z ERO -S EQUENCE C URRENT V ECTOR S ECTOR Power Generation Ratios

I II λbc<λab<λca λbc<λca<λab Vgca Iac

III λab<λbc<λca

I

Iba 0

VLab θΔ

Vgbc Icb

VI λca<λbc<λab Vgab

IV λab<λca<λbc

VLbc V λca<λab<λbc

(b) Fig. 2. Phasor diagrams, (a) balanced operation, and (b) unbalanced operation demonstrating the zero-sequence current injection.

the three-phase line currents as: √ 2Ig cos ωt, √ = 2Ig cos (ωt − 2π/3), √ = 2Ig cos (ωt + 2π/3),

iga =

(3a)

igb

(3b)

igc

(3c)

and the zero-sequence current as: i0 =



2I 0 cos (ωt + θ∆ ).

(4)

When the power generation becomes unbalanced, the active power delivered by each phase should be equal to its generated PV power: √ Vg Ig / 3 + Vg I 0 cos (π/6 − θ∆ ) = λab Pnom /3, √ Vg Ig / 3 + Vg I 0 cos (3π/2 − θ∆ ) = λbc Pnom /3, √ Vg Ig / 3 + Vg I 0 cos (5π/6 − θ∆ ) = λca Pnom /3.

(I)

λbc < λab < λca

(II)

λab < λbc < λca

(III)

λab < λca < λbc

(IV)

λca < λab < λbc

(V)

λca < λbc < λab

(VI)

By simultaneously solving (5), the zero-sequence current required to balance the phase-leg power levels can be calculated as: √ 2Γ∆ Pnom 0 I = , (6a) 9Vg  ! √  6 (λca − λbc )   π/6 + sin−1 Sectors (I), (VI)    2Γ∆   ! √   6 (λbc − λab ) −1 Sectors (II), (III) , θ∆ = 5π/6 + sin  2Γ∆   ! √    6 (λab − λca )  3π/2 + sin−1 Sectors (IV), (V)   2Γ∆ (6b) q 2 2 2 where Γ∆ = (λab − λbc ) + (λbc − λca ) + (λca − λab ) . (6c)

(a)

VLca

Sector

λbc < λca < λab

(5a) (5b) (5c)

The location of the zero-sequence vector depends on the relation between the three-phase power generation ratios which creates six sectors in the phasor diagram. These sectors are defined in Table I and illustrated in Fig. 2b, which also shows an imbalance case with the zero-sequence vector in Sector I. The phasor diagram is divided into six sectors according to the relationship between the three-phase power generation ratios, as in Fig. 2b and Table I. For the star connection, the resultant converter output voltage of each phase consists of i) the grid voltage, ii) the inductor voltage, and iii) the zero-sequence voltage. When the inter-phase power imbalance becomes severe, the amplitude of the zero-sequence voltage becomes larger. The converter may reach saturation and grid currents would then become unbalanced and distorted. Therefore, voltage overrating is required by connecting more H-bridges in series to increase the available dc voltage. However, the scenario in the delta connection is different. The phase-leg current consists of a positive-sequence current and a zero-sequence current. When the inter-phase power imbalance becomes severe, the amplitude of the zero-sequence current is expected to increase. However, the positive-sequence current decreases during this condition, owing to the drop in overall power. The necessary semiconductor overrating to tolerate all possible power imbalance cases is, therefore, reduced [22]. In addition, a temporary over-current (< 5 s), during severe imbalance, can usually be tolerated in industrial converters, whereas any over-voltage is likely to destroy the semiconductors immediately.

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vab vdc

PI

(ab1)

vab1

1/N

λab λbc

Æ vdc (abj ) /N

0 i *(ω)

vab 0

i *

Eq. (4)

λca

j

vab+ vbc+ vca+

conventional 50 Hz component

v

P i

0

vbc vca

R(ω)

0

(a) iba

power flow direction detection

icb

vab

iac

iba

sgn(x) vab

vdc (ab1)

Third Harmonic Generator

R(3ω) 0 i *(3ω)

additional 150 Hz component

vab1

(a)

1/N

PI

pab1

Æj vdc (abj )/N (b) Fig. 3. Controller implementation, (a) Inter-bridge power balance loop with fundamental frequency components and, (b) inter-bridge power balance loop with power flow direction detection.

pab

PI

vdc( ij )

idc ( ij ) vdc*

pabN pbc1 pbcN pca1

pbc

p

2 3Vgd

id *

pca

pcaN

III. C ONTROL I MPLEMENTATION The operation of CHB converters in PV applications require controllers in order to address both the inter-bridge and the inter-phase imbalance. The controller implementation used in the rest of the paper is described in this section. A. Inter-bridge power balance loop The inter-bridge power balance loop (phase ab) is shown in Fig. 3 [12]–[16], [18]. The loop is formed based on the assumption that power always flows from the converter to the grid (defined as positive power flow). Therefore, the bridge with its dc-side capacitor voltage higher than the average synthesizes a larger share (> 1/N ) of the phase output voltage to increase the output power, and vice versa [12]–[18], [28]. Furthermore, when the phase-leg current is low, the interbridge power balance loop has poor dynamic performance, because the amount of power exchange is limited by the current magnitude. Therefore, an additional third harmonic zero-sequence current i0 (3ω) is injected to increase the current magnitude. The control method used to inject the third harmonic current is described in the next section. B. Inter-phase power balance loop An inter-phase power balance loop generates a fundamental frequency zero-sequence current, which helps maintain threephase balanced line currents, even with unbalanced threephase power generation [14]–[18]. The fundamental frequency zero-sequence current reference i0∗ (ω) (Fig. 4a) is calculated according to power generation levels in the three phases as in (6). A proportional resonant (PR) controller with the resonant gain tuned at ω generates a zero-sequence voltage v 0 to track the reference i0∗ (ω). The zero-sequence voltage v 0 is then + + + added to the positive-sequence component vab , vbc , vca to obtain the final converter output voltage references. Please

(b) Fig. 4. Controller implementation, (a) Inter-phase power balance loop with two resonant gains tuned at ω and 3ω, (c) Active power reference generation.

note the zero-sequence voltage in the delta connection is much smaller than that in the star connection [14], [15] because in the delta connection the zero-sequence voltage is only responsible for creating zero-sequence current, rather than driving the inter-phase power exchange. An additional third harmonic current reference i0∗ (3ω) is added to the fundamental frequency zero-sequence current reference in Fig. 4a. It does not affect the inter-phase power balance loop, but improves the dynamic performance of interbridge power balance loops as mentioned in the previous subsection. An additional resonant gain tuned at 3ω is required to track i0∗ (3ω). Finally, the decoupled dq control regulates the positivesequence component of the phase-leg currents, assuming equal amounts of power are generated by the three phases. The active power reference (Fig. 4b) of each bridge is calculated by comparing the measured dc-side capacitor voltage vdc(ij) ∗ (i ∈ {ab, bc, ca}; j ∈ {1, 2, ..., N }) to its command vdc . The phase power reference can then be obtained by adding the bridge power references in the phase leg, and the overall power reference by adding the three phase power references. IV. C OMPARISON BETWEEN S TAR AND D ELTA C ONNECTIONS To deal with inter-phase power imbalance, additional zerosequence voltage (Y) or current (∆) must be injected, both of which are expected to increase as the inter-phase power imbalance becomes more severe. As a result, the converter needs to be overrated in terms of voltage or current. This section analytically derives both the required voltage and current

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overrating for the star and delta connections, considering a generalized unbalanced case with non-zero connection inductance. Although the extreme power imbalance associated with worst scenarios in terms of voltage or current overrating may rarely happen in practice, this section calculates the converter rating required to tolerate all possible power imbalance cases.

Therefore, G (λab , λbc , λca ) reaches the maximum value at λab = 1, λbc = 0, λca = 1. The maximum required device voltage rating v √ u ∆ u 3 + 2 3Lf (p.u.),∆ + 4L2f (p.u.),∆ Vmax u   =t . (16) ∆ Vnom 3 1 + L2f (p.u.),∆

A. Voltage Overrating (∆)

The worst cases are (λab , λbc , λca ) = (1, 1, 0) , (1, 0, 1) and (0, 1, 1), which corresponds to two phases generating full power while the remaining phase producing zero power.

The required voltage overrating can be calculated by developing an analytical function of the overrating as a function of the power imbalance and identifying the worst case power imbalance. The per-unit value of the filtering inductor Lf in the delta connection is defined as: Lf (p.u.),∆ =

ωLf Pnom . 3Vg2

(7)

The required voltage rating during balanced operation (Fig. 2b): √ q ∆ 2 . Vnom = 2 Vg2 + VL,∆ (8) where VL,∆ = Lf (p.u.),∆ Vg . Again, the case when the zero-sequence current vector I0 is located in Sector I (λab ≥ λca ≥ λbc ) (Fig. 2b) is analyzed. The required voltage rating with the injected zero-sequence current can be derived as:   √  π 2 V ∆ = 2 Vg + ωLf I 0 sin θ∆ + (9) 6  2 1/2  λa + λb + λc π 0 + VL,∆ − ωLf I cos θ∆ + , 3 6 (10) with I 0 and θ∆ of (6). The required voltage overrating is a function of the power generation ratios √ p (11) V ∆ = 2 G (λab , λbc , λca ), where G=

+

3Lf (p.u.),∆ Vg2 I 0 sin θ∆ + Vg + Pnom

π 6

!2

 3Lf (p.u.),∆ Vg2  √ π  Ig / 3 − I 0 cos θ∆ + Pnom 6

!2 . (12)

The partial derivatives of G with respect to λab , λbc and λca are then:  2Vg2 Lf (p.u.),∆ √ ∂G = 3 + Lf (p.u.),∆ (λab − λbc ) > 0, ∂λab 3 (13)  2Vg2 Lf (p.u.),∆ √ ∂G =− 3 + Lf (p.u.),∆ (λab − λbc ) < 0, ∂λbc 3 (14) ∂G = 2Vg2 L2f (p.u.),∆ λca ≥ 0. (15) ∂λca

B. Current overrating (∆) Similarly to the previous calculation, the worst case imbalance for the current overrating can be calculated. The required current rating during balanced operation is: √ 2Pnom ∆ . (17) Inom = 3Vg Again, the case when the zero-sequence current vector I0 is located in Sector I (λab ≥ λca ≥ λbc ) (Fig. 2b) is analyzed. The required current rating with the injected zero-sequence current can be derived as:  2  √ I π √g + I 0 cos θ∆ − I∆ = 2 (18) 6 3 1/2   π 2 0 , (19) + I sin θ∆ − 6 with I 0 and θ∆ of (6). The required current overrating is a function of the power generation ratios √ p I ∆ = 2 H (λab , λbc , λca ), (20) where  √ 2 2 H = Ig / 3 + I 0 cos (θ∆ − π/6) + I 0 sin (θ∆ − π/6) . (21) The partial derivatives of H with respect to λab , λbc and λca 2 ∂H 2Pnom = λab ≥ 0, (22) ∂λab 9Vg2 2 ∂H 2Pnom = (λbc − λca ) ≤ 0, ∂λbc 27Vg2

(23)

2 2Pnom ∂H = (λca − λbc ) ≥ 0. ∂λca 27Vg2

(24)

Therefore, H (λab , λbc , λca ) reaches the maximum value at λab = 1, λbc = 0 and λca = 1. The maximum required device current rating √ 2 6Pnom √ ∆ Imax 2 3 9Vg √ = = ≈ 1.155. (25) ∆ Inom 3 2Pnom 3Vg The worst cases are (λab , λbc , λca ) = (1, 1, 0) , (1, 0, 1) and (0, 1, 1), which again correspond to two phases generating full power while the third phase produces zero power.

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C. Voltage overrating (Y)

PBF=92.32%

A similar analysis can be developed for the star-connected CHB converter, assuming operation in Sector I. The per-unit value of the filtering inductor Lf is: Lf (p.u.),Y =

ωLf Pnom . Vg2

1 0.8 λca

(26)

0.6 0.4 0.2 0 1

and the required voltage rating per-phase during balanced operation: r √ 2 √  Y 2 , Vg / 3 + VL,Y Vnom = 2 (27) √ where VL,Y = Lf (p.u.),Y Vg / 3. The required voltage rating per phase with the injected zerosequence voltage is given by:  2 √  √ Y V = 2 Vg / 3 + V 0 cos θY (28)  2 1/2 λa + λb + λc , + V 0 sin θY + VL,Y 3

0.8

0.6 λbc

0.4

0.2

0

0

0.2

0.4

0.6 λab

0.8

1

(a) PBF=4.29% 1 0.8 λc

0.6 0.4 0.2

(29)

0 1

In practical application, the per-unit inductance value should be quite small 0 < Lf (p.u.),Y ≤ 0.1 and it can be shown that F (λa , λb , λc ) reaches its maximum value at λa = 1, λb = 0, λc = 0. The required overrating of the star-connected CHB converter is given by substituting these values into (28): v u Y 81 + L2f (p.u.),Y Vmax 1u t = . (31) Y Vnom 3 1 + L2f (p.u.),Y Similar analysis can be repeated in the remaining sectors. The worst cases are (λa , λb , λc ) = (1, 0, 0) , (0, 1, 0) and (0, 0, 1), which corresponds to one phase generating full power while the remaining two phases producing zero power. D. Current overrating (Y) When the inter-phase power imbalance occurs in the star connection, the current is always less than the nominal, because of the drop in overall power. As a result, current overrating is not necessary in the star-connected CHB. E. Comparison & Discussion A comparison between the power balancing capabilities of the two converters can be made based on the overrating considerations and considering that the two designs would share the same i) grid voltage Vg , ii) nominal power rating Pnom , iii dc-side capacitor voltages vdc , iv) semiconductor requirements and v) harmonic performance. Two metrics that assess the converter power balance capabilities are the Power Balance Space (PBS) and the Power Balance Factor (PBF) [33]. The power generation of each phase fluctuates with changing solar irradiance and/or ambient temperature of the solar panels connected to that phase. Based

0.8 0.6

The required voltage overrating is a function of the power generation ratios: √ p VY = 2 F (λa , λb , λc ), (30)

λb

0.4

0.2

0

0

0.2

0.4

0.6 λa

0.8

1

(b) Fig. 5. Power Balance Spaces of the designed (a) delta (b) starconnected CHB converters.

on the definition of power generation ratios, these can only vary between zero and one for the delta or the star configuration so that 0 ≤ λab , λbc , λca ≤ 1 (∆) or 0 ≤ λa , λb , λc ≤ 1 (Y ) all possible power imbalance cases fall within a unity cube (1 × 1 × 1). Each power imbalance case can be represented by a unique operation point (λ0ab , λ0bc , λ0ca ) or (λ0a , λ0b , λ0c ) inside the cube. If the maximum converter output voltage is lower than the total available dc-side voltage of one phase-leg then three-phase balanced grid currents can be generated without saturation, and this operation point can be rebalanced using the given method. PBS is defined as the three-dimensional space that includes all operation points (λa , λb , λc ) (Y ) or (λab , λbc , λca ) (∆) that can be tolerated by the converter. PBF, defined as the volume of PBS, indicates the converter power balance capability [14], [15]. A larger PBF indicates more operation points can be rebalanced. Z1 Z1 Z1 P BF = F (λa , λb , λc ) dλa dλb dλc , (32) 0

0

0

where ( 1, max {va , vb , vc } (λa , λb , λc ) ≤ N vdc F (λa , λb , λc ) = . 0, max {va , vb , vc } (λa , λb , λc ) > N vdc (33) The PBS of two designed star and delta-connected converters of Table II is shown in Fig. 5 with the corresponding PBF. The PBS of the delta-connected converter, based on the assumptions of the comparison (Fig. 5a), features a much larger volume than that of the star-connected counterpart (Fig. 5b),

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TABLE II E XPERIMENTAL P ROTOTYPE PARAMETERS 430V 50Hz

430V:430V 10kVA

Lf = 10mH

Parameters

ab3

bc3

ca3

ab2

bc2

ca2

a1

C

PV simulator

vdc=239.4V

H-bridge

bc1

ca1

(a) control PC

dSPACE & FPGA

three-phase seven-level PV simulators CHB converter

Inductors and transformer (b)

Values

Grid Voltage, Vg

430 V

Three-phase Nominal Power, Pnom

10 kW

Filtering Inductance per phase, Lf

10 mH (0.06 p.u.)

MPP of PV Simulators

239.4 V, 4.645 A

dc-side Capacitor Voltage, vdc

239.4 V

Carrier Frequency, fs

1500 Hz

With three bridges in the phase leg, the converter output voltages feature seven-level waveforms with an equivalent switching frequency of 9 kHz. In practical applications with a higher number of bridges per phase, a lower carrier frequency can be used to achieve similar harmonic performance. A limitation of the experimental implementation is that the converter can only track the MPP under nominal conditions, because vdc is kept constant during the operation and dc-dc converters are not included in the setup. When the irradiance changes, the converter cannot track the MPP of the new condition, because vdc remains constant. However, this does not affect the results and conclusions from the experiment as there still exists an unbalanced power generation between the three phases of the converter i.e. it is only the magnitude of that imbalance which is slightly different.

Fig. 6. Experimental setup: (a) schematic diagram and (b) hardware.65

A. Balanced operation (λab = λbc = λca = 1)

being able to generate three-phase balanced line currents for 92.32% of all possible power imbalance cases compared to the only 4.29% of all cases for the star-connected CHB. Therefore, in terms of ability to cope with inter-phase power unbalance (and given an equal installed switching power), the deltaconnected CHB converter is far superior to that of its starconnected counterpart.

Under steady-state and balanced operation, all nine PV simulators are subject to the same nominal conditions of 1000 W/m2 irradiance assuming temperature of 25◦ C. The three-phase converter output voltages and phase-leg currents are depicted in Fig. 7(a), both of which are balanced and symmetrical, as the power generation levels from the PV side is equal in the three phases. The three-phase line currents are also balanced and symmetrical with an average rms value of 12.4 A. The zero-sequence current to deal with the power imbalance is almost zero (Fig. 7(b)).

V. E XPERIMENTAL V ERIFICATION Experimental results obtained from a 430 V, 10 kW, threephase, seven-level, delta-connected CHB converter prototype are provided to demonstrate the operation and power balance capabilities of the delta-connected CHB converter in PV applications. The schematic diagram and experimental setup of the sevenlevel experimental prototype, including the 5 kVA TerraSAS programmable PV simulators and APS PP75B060 H-bridge modules is shown in Fig. 6 while the parameters of the experiment are given in Table II. The delta-connected CHB converter is connected to a 430 V grid via a 1:1 transformer for isolation purposes during the experiment. The control, interphase and inter-bridge power balance functions of the converter are implemented in a dSPACE DS1006 platform while the modulation, based on the conventional Phase Shift Pulse Width Modulation (PS-PWM) [34] with a carrier frequency of 1500 Hz, is implemented in Xilinx FPGA modules operating at 100 MHz.

B. Mild inter-phase (λab ≈ 0.5, λbc = λca = 1)

power

imbalance

The solar irradiance of the three PV simulators in phase ab is decreased from 1000 W/m2 to 500 W/m2 to emulate a mild case of power imbalance between the power generation of the three-phases. Due to the lack of dc-dc conversion stages, the actual power generation level is approximately 50% of its nominal value. Fig. 8(a) shows the three-phase converter output voltages and phase-leg currents under mild inter-phase power imbalance. The phase-leg currents are no longer symmetrical since phase ab generates less power than the other two phases. However, the three-phase line currents injected to the grid (Fig. 8(b)) still feature symmetrical and balanced sinusoidal waveforms with an average rms value of 10.3 A, demonstrating the balancing capabilities and high harmonic performance of the delta-connected CHB converter. The zero-sequence current, which only flows within the delta

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(a)

(a)

(b)

(b)

Fig. 7. Balanced operation: (a) three-phase converter output voltages and phase-leg currents. CH1: voltage of phase ab vab , CH2: current of phase ab iba , CH3: voltage of phase bc vbc , CH4: current of phase bc icb , CH5: voltage of phase ca vca , CH6: current of phase ca iac . CH1, CH3, CH5: 500 V/div; CH2, CH4, CH6: 10 A/div. (b) line currents and zerosequence current. M1: line current of phase a iga , M2: line current of phase b igb , M3: line current of phase c igc , M4: zero-sequence current i0 . M1, M2, M3, M4: 10 A/div. Timescale: 5 ms/div.

Fig. 8. Mild inter-phase power imbalance:(a) three-phase converter output voltages and phase-leg currents. CH1: voltage of phase ab vab , CH2: current of phase ab iba , CH3: voltage of phase bc vbc , CH4: current of phase bc icb , CH5: voltage of phase ca vca , CH6: current of phase ca iac . CH1, CH3, CH5: 500 V/div; CH2, CH4, CH6: 10 A/div. (b) line currents and zero-sequence current. M1: line current of phase a iga , M2: line current of phase b igb , M3: line current of phase c igc , M4: zerosequence current i0 . M1, M2, M3, M4: 10 A/div. Timescale: 5 ms/div.

to cope with the unequal power generation levels, is also shown in Fig. 8(b).

the harmonic performance [16]. However, this issue does not appear in the delta-connected CHB converter. As illustrated in Fig. 9(a), the converter output voltage of the phase with zero power generation still features a seven-level waveform, because with the delta connection, a zero-sequence current i0 is injected to ensure the power balance between the three phases instead of a zero-sequence voltage.

C. Worst-case inter-phase (λab = 0, λbc = λca = 1)

power

imbalance

The solar irradiance of the three PV simulators in phase ab is further decreased to 0, which means a small amount of active power needs to be delivered into phase ab to maintain the capacitor voltage levels, because of the losses. This is the worst inter-phase power imbalance cases derived in Section IV. As illustrated in Fig. 9(a), under this extreme power imbalance case, the three-phase line currents still exhibit symmetrical waveforms with an average rms value of 8.2 A.The injected zero-sequence current, including both the fundamental and third harmonic components, is also demonstrated in Fig. 9(b). It would not be possible for the star connection to deal with this extreme case without significantly overrating the converter (Section IV and [16]). The superior power balance capability of the presented delta connection is thus confirmed. Furthermore, in the star connection, the converter output voltage of the phase with low power generation is expected to exhibit lower number of voltage levels, which adversely affects

VI. C ONCLUSION The delta-connected CHB converter provides an alternative configuration for large-scale PV applications. A major difference between the two configurations is that the delta-connected topology offers superior power balancing capabilities in order to address unbalanced power generation amongst the three phases without requiring significant voltage or current overrating. In this paper, the capability has been demonstrated both analytically in terms of worst-case power imbalances and practically by comparing the Power Balance Space of the two configurations. Experimental results demonstrate both the operation of the delta-connected cascaded H-bridge converter in PV applications and its power balancing capabilities.

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(a)

(b) Fig. 9. Worst-case inter-phase power imbalance: (a) three-phase converter output voltages and phase-leg currents. CH1: voltage of phase ab vab , CH2: current of phase ab iba , CH3: voltage of phase bc vbc , CH4: current of phase bc icb , CH5: voltage of phase ca vca , CH6: current of phase ca iac . CH1, CH3, CH5: 500 V/div; CH2, CH4, CH6: 10 A/div. (b) line currents and zero-sequence current. M1: line current of phase a iga , M2: line current of phase b igb , M3: line current of phase c igc , M4: zero-sequence current i0 . M1, M2, M3, M4: 10 A/div. Timescale: 5 ms/div.

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Yifan Yu (S’13) received the B.Eng. and M.Eng. degrees in electrical engineering from the Harbin Institute of Technology, Harbin, China, in 2010 and 2012, respectively. He is currently working towards the Ph.D. degree at the School of Electrical Engineering and Telecommunications, UNSW Australia. His current research interests include topologies and control strategies for multilevel PV converters.

Georgios Konstantinou (S’08–M’11) received the B.Eng. degree in electrical and computer engineering from the Aristotle University of Thessaloniki, Thessaloniki, Greece, in 2007 and the Ph.D. degree in electrical engineering from UNSW Australia, Sydney, in 2012. From 2012 to 2015 he was a Research Associate at UNSW Australia where he is currently a Lecturer with the School of Electrical Engineering and Telecommunications. His main research interests include hybrid and modular multilevel converters, power electronics for HVDC and energy storage applications, pulse width modulation and selective harmonic elimination techniques for power electronics.

Christopher D. Townsend (S’09–M’13) received the B.E. (2009) and Ph.D. (2013) degrees in electrical engineering from the University of Newcastle, Australia. He was with ABB Corpo¨ ˚ Sweden and The Unirate Research, Vaster as, versity of New South Wales, Australian Energy Research Institute, Sydney, Australia. He is currently with the School of Electrical Engineering and Computer Science, University of Newcastle, Australia. His current research interests include topologies and modulation strategies for multilevel converters. He is a member of the Power Electronics and Industrial Electronics Societies of the IEEE.

Ricardo Aguilera (S’01-M’12) received the M.Sc. degree in electronics engineering from the Universidad Tecnica Federico Santa Maria, Valparaiso, Chile, in 2007, and the Ph.D. degree in electrical engineering from the University of Newcastle (UN), Callaghan, Australia, in 2012. In 2012, he was a Research Academic with the UN, where he was part of the Centre for Complex Dynamic Systems and Control. From 2014 to 2016, he was a Senior Research Associate at the University of New South Wales, Australia. In 2016, he joined the School of Electrical, Mechanical and Mechatronic Systems, University of Technology Sydney, Sydney, Australia, where he currently holds a Lecturer position. His main research interests include power electronics and theoretical and practical aspects of model predictive control.

Vassilios G. Agelidis (S’89-M’91-SM’00-F’16) was born in Serres, Greece. He received the B.Eng. degree in electrical engineering from the Democritus University of Thrace, Thrace, Greece, in 1988, the M.S. degree in applied science from Concordia University, Montreal, QC, Canada, in 1992, and the Ph.D. degree in electrical engineering from Curtin University, Perth, Australia, in 1997. He has worked at Curtin University (1993-1999), University of Glasgow, U.K. (2000-2004), Murdoch University, Perth, Australia (2005-2006), the University of Sydney, Australia (2007-2010), and the University of New South Wales (UNSW), Sydney, Australia (2010-2016). He is currently a professor at the Department of Electrical Engineering, Technical University of Denmark. Dr. Agelidis received the Advanced Research Fellowship from the U.K.’s Engineering and Physical Sciences Research Council in 2004. He was the Vice-President Operations within the IEEE Power Electronics Society from 2006 to 2007. He was an AdCom Member of the IEEE Power Electronics Society from 2007 to 2009 and the Technical Chair of the 39th IEEE Power Electronics Specialists Conference, Rhodes, Greece, 2008.

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