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Line filter design of parallel interleaved VSCs for high power wind energy conversion systems ... L., Teodorescu, R., Kerekes, T., & Blaabjerg, F. (20...

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Line filter design of parallel interleaved VSCs for high power wind energy conversion systems Gohil, Ghanshyamsinh Vijaysinh; Bede, Lorand; Teodorescu, Remus; Kerekes, Tamas; Blaabjerg, Frede Published in: I E E E Transactions on Power Electronics DOI (link to publication from Publisher): 10.1109/TPEL.2015.2394460

Publication date: 2015 Document Version Early version, also known as pre-print Link to publication from Aalborg University

Citation for published version (APA): Gohil, G. V., Bede, L., Teodorescu, R., Kerekes, T., & Blaabjerg, F. (2015). Line filter design of parallel interleaved VSCs for high power wind energy conversion systems. I E E E Transactions on Power Electronics, 30(12), 6775 - 6790. https://doi.org/10.1109/TPEL.2015.2394460

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Aalborg University

Line Filter Design of Parallel Interleaved VSCs for High Power Wind Energy Conversion System Gohil, Ghanshyamsinh; Bede, Lorand; Teodorescu, Remus; Kerekes, Tamas; Blaabjerg, Frede Published in: IEEE Transactions on Power Electronics DOI (link to publication from Publisher):

10.1109/TPEL.2015.2394460 Publication date: July, 2014 Link to publication from Aalborg University - VBN

Suggested citation format:

G. Gohil, L. Bede, R. Teodorescu, T. Kerekes, F. Blaabjerg, "Line Filter Design of Parallel Interleaved VSCs for High Power Wind Energy Conversion System," IEEE Transactions on Power Electronics, [Online early access] DOI: 10.1109/TPEL.2015.2394460.

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Line Filter Design of Parallel Interleaved VSCs for High Power Wind Energy Conversion Systems Ghanshyamsinh Gohil, Student Member, IEEE, Lorand Bede, Student Member, IEEE, Remus Teodorescu, Fellow, IEEE, Tamas Kerekes, Member, IEEE, and Frede Blaabjerg, Fellow, IEEE

Abstract—The Voltage Source Converters (VSCs) are often connected in parallel in a Wind Energy Conversion System (WECS) to match the high power rating of the modern wind turbines. The effect of the interleaved carriers on the harmonic performance of the parallel connected VSCs is analyzed in this paper. In order to achieve low switching losses, the 60◦ clamp Discontinuous PulseWidth Modulation (DPWM1) is used to modulate the VSCs. A step-by-step design procedure of the line filter, which ensures the desired harmonic performance under all operating conditions, is presented. The analytical harmonic solution for the two parallel interleaved VSCs is derived in order to obtain the worst case voltage magnitude of the individual harmonic components. The required value of the filter admittance for the specific harmonic component is obtained by using the worst case voltage magnitude and the allowable harmonic injection limit. In order to achieve the desired filter performance with optimal values of the filter parameters, the use of a LC trap branch with the conventional LCL filter is proposed. The expressions for the resonant frequencies of the proposed line filter are derived and used in the design to selectively choose the values of the line filter components. The analysis and design methodology are also verified experimentally. Index Terms—Voltage source converters (VSC), parallel, interleaving, filter design, trap filter, discontinuous pulse-width modulation (DPWM), wind power

I. I NTRODUCTION The power electronics converters play a vital role in integrating a wind turbine into the power system [1]. The full scale power converter is often used in modern Wind Energy Conversion System (WECS) due to its ability to provide the reactive power compensation and a smooth grid connection for the entire speed range, and it is generally realized using three-phase two-level pulsewidth modulated Voltage Source Converter (VSC) [2]. The general trend is to use the wind turbines with high output power (megawatt scale) [3] and the switching frequency of the semiconductor devices employed in these systems is often limited [4]. Therefore, large filters are required in order to meet the stringent power quality requirements imposed by the utility [5]. These filters occupy significant amount of space in the overall system [6]. Moreover, considerable losses occur in the filter components and the overall conversion efficiency is compromised if large filter components are used [4]. They also result in increased cost of the overall converter system [7]. Therefore, the filter size should be made as small as possible to achieve efficient, compact and cost-effective WECS system. Due to the limited power handling capability of the existing semiconductor devices, the two level VSCs are often connected in parallel [8]–[11] to match the high power rating

of the wind turbine. The parallel connected VSCs can be operated with interleaved carriers to reduce the value of the filter components [12]–[18]. However, the carrier interleaving results in common-mode voltage difference across the parallel VSCs. If the conventional three limb three-phase differential mode inductor is used without any additional circulating current filter, high common-mode circulating current flows as there is no high permeability magnetic path available for the common-mode flux in the three limb three-phase differential mode inductor [19]. Another approach is to use the single phase inductor, which acts as both the circulating current filter and the line filter and permits the use of the interleaved carriers without having any additional circulating current filter. However, the use of the single phase inductor does not bring any advantages in terms of size reduction of the filter components [20] and a dedicated filter to suppress the circulating current is often required. The use of the parallel interleaved VSCs for the active power filter application is presented in [13], [14], where a commonmode inductor is employed to suppress the circulating current and the reduction in the size of the passive components is demonstrated. A use of Coupled Inductor (CI) for suppressing the circulating current is presented in [21] and substantial size reduction of the filter components can be achieved by using the CI over the single phase line inductor solution [20]. However, the control complexity increases as the precise control over the fundamental frequency circulating current is required in order to avoid the saturation of the CI [22]. Some of the harmonic components that are present in the switched output voltage of the individual VSCs can be canceled by using the interleaved carriers. Miller et al. [12] studied the line current harmonic cancellation effect of N parallel interleaved VSCs. The effects of the PulseWidth Modulation (PWM) scheme, the interleaving angle, and the modulation indices on the line current quality are analyzed in [15]. The optimal interleaving angle to improve the line current quality is discussed in [16]. Mao et al. [17] presented a hybrid PWM scheme, involving multiple switching sequences and different interleaving angles to improve the line current quality. The interleaved carriers in the parallel VSCs can reduce the filtering requirement by phase shifting some of the harmonic components and thus fully or partially cancel their contribution in the line current. Further reduction in the values of the filter components can be achieved by using a high-order filter [23]. The LCL filter is an attractive option [24]–[26], and it is commonly used in the WECS [2]. For the LCL filter, the

2

VSC1 Lc Vdc 2

x1

Ix,1 Ix,2

Transformer leakage inductance

Ix Lf

x, cap

Ix,g

Lg

PCC

Zgrid MV Grid

O

∆Ix

VSC2

Step-up Transformer Ct Vdc 2

x2

Lt Cf

LCL filter with additional trap branch Fig. 1. The grid side converter of the WECS, comprised of two parallel VSCs with interleaved carriers, connected to the medium voltage network by using a step-up transformer. x = {A, B, C}

admittance transfer function is given as Ig (s) YLCL (s) = VP W M (s)

1 1 2 2 Lf Lg Cf s(s + ωr,LCL ) Vg =0 (1) where Lf is the converter side inductor, Lg is the grid side inductor, Cf is the filter capacitor, Ig is the grid current, Vg is the grid voltage, and VP W M is the switched voltage of the VSC. The resonant frequency of the LCL filter is given as =

s ωr,LCL =

Lf + Lg Lf Lg Cf

(2)

Due to the presence of the complex conjugate poles, the rolloff of the high frequency components (higher than the ωr,LCL ) is -60 dB/decade. Therefore, the LCL filter offers good attenuation to the high frequency harmonic components, and it can effectively reduce the differential mode electromagnetic interference (above 150 kHz) [24]. The switched voltages at the VSC terminals have harmonic components concentrated around the multiple of the carrier frequency. Due to the limited switching capability of the semiconductor devices used in the high power applications, a fairly high value of the filter components are required for the LCL filter to attenuate the major harmonic components (first carrier frequency and its sideband harmonics). The value of the filter components can be reduced by using a LC trap branch, which is tuned to attenuate the major carrier harmonics and its sideband harmonics. This can be realized by inserting an inductor in series with the capacitor of the LCL filter [27]. The use of the LC trap branch to attenuate the sideband harmonic components around the carrier frequency is proposed in [27], [28]. The multiple LC trap branches are used, to attenuate the carrier harmonic and its sideband harmonic components around the carrier frequency and its multiple, in [29], [30]. The admittance transfer function of the line filter with the LC trap branch, commonly known as

trap filter, is given as  1 Ytrap (s) = (Lf + Lg ) +

 Lf Lg Lt

s2 + ωt2 2 s(s2 + ωr,trap )

(3)

The resonant frequencies are given as ωt = p ωr,trap = s

1 Lt Cf

1 Lf Lg Lf +Lg

(4)  + Lt Cf

where Lt is the inductor inserted in series with the capacitor Cf of the LCL filter. From (4), it is evident that the ωr,trap is less than the ωt . Due to the introduction of the complex conjugate zeros, the roll-off of the high frequency components (higher than the ωt ) is -20 dB/decade. This leads to a poor attenuation of the high frequency harmonic components. On the contrary, the LCL filter offers good attenuation to the high frequency harmonic components. Therefore, the LC trap branch along with the LCL filter can be used to achieve the desired filtering performance (both at the low and the high frequency components) with small values of the filter components. The use of such a filter for single VSC is presented in [31]. However, the high frequency attenuation is compromised due to insertion of the damping resistor in series with the capacitive branch. The VSCs are often connected in parallel in the WECS and the use of interleaved carriers to fully or partially cancel the effect of some of the harmonic frequency components is proposed in this paper. The design procedure of the LCL filter with additional LC trap branch of two parallel interleaved VSCs is presented. The paper is organized as follows: the operation of the parallel interleaved VSCs is briefly described in Section II. The analysis of the proposed high-order line filter is discussed in Section III and the filter design constraints along with the step-by-step design procedure are presented in Section IV. The simulation and the experimental results are finally presented in Section V to verify the analysis.

3

The carrier signals, of the parallel connected VSCs in WECS (shown in the Fig. 1), are interleaved to reduce the value of the filter components. The effect of the interleaved carriers on the operation of the parallel VSCs is analyzed in this section. The interleaved operation of the parallel VSCs: 1) Improves the line current quality. 2) Reduces the switch current ripple of each VSC, provided the circulating current is suppressed effectively. Therefore, the value of the filter components can be reduced. However, additional inductive filter is required to suppress the circulating current. A CI is used as a circulating current filter [15], [20]–[22], [32]–[34] due to its effectiveness in suppressing the circulating current. Multiple parallel interleaved VSCs with magnetic coupling between the parallel interleaved legs of the corresponding phase can be realized using the following configurations [21]: 1) Whiffletree configuration. 2) Cyclic cascade configuration. 3) Using a magnetic structure with multiple parallel magnetic limbs. In addition to suppress the circulating current, the CI also performs the function of averaging the switched output voltage of the parallel interleaved legs [21]. The values of the line filter components depend on the magnitude of the individual harmonic component in the average output voltage, which is the same in all of the above mentioned CI configurations. Therefore, the line filter design can be carried out independently, without considering the circulating current filter arrangement. In this paper, the WECS with two parallel interleaved VSCs is considered. However, the line filter design approach, presented in this paper, can be used for any number of parallel interleaved VSCs. The use of the LC trap branch with the conventional LCL filter is proposed. The converter side inductor Lf , the grid side inductor Lg , and the capacitor Cf forms the LCL filter. The series connection of the Lt and Ct forms the LC trap branch. The WECS is connected to a medium voltage network by using a step-up transformer. The leakage inductance of a step-up transformer often ranges from 0.04-0.06 pu [35], and it is considered as a part of the grid side inductance Lg . The interleaving angle of 180◦ is used as it results in optimal harmonic performance at high modulation indices [16]. The closed form analytical solution to determine the individual voltage harmonic components of the pulsewidth modulated voltage is derived. Moreover, the relationship between the maximum value of the switch current ripple and the converter side inductor is also obtained in this section. A. Modulation Scheme The 60◦ clamp discontinuous PWM (DPWM1) [36] scheme clamps the output terminals of the VSCs to the positive and the negative terminals of the dc-link for a 60◦ interval each in a

Magnitude (pu)

II. PARALLEL I NTERLEAVED VOLTAGE S OURCE C ONVERTERS

1 0.5 0 −0.5 −1 0 30

150 210 330 Reference space vector angle (degree)

Fig. 2. Modulation waveform of 60◦ clamp PWM (DPWM1) scheme with modulation index M = 1.

+Vdc /2 VA1O −Vdc /2 +Vdc /2 VA2O −Vdc /2

T0

T1

T2

T2

T1

Ts

T2

T0 T0

T1

T1

T0

T2

VA,avg +Vdc

∆λA

VA,cap

VA,dif f λA,c −Vdc Fig. 3. The effect of the interleaved carriers. The pole voltages of phase A of the individual VSCs and their average VA,avg and difference VA,dif f are depicted. The modulation index is M =1, the interleaving angle is 180◦ and the reference space vector angle is ψ = 45◦ .

fundamental cycle, as shown in Fig. 2. The clamping intervals of 60◦ are arranged around the positive and negative peak of the fundamental reference voltage. For the applications, where the displacement power factor is close to unity, the switching is avoided when the current through the devices is near its peak [37]. In addition to the active power, the WECS is also required to provide reactive power within a power factor range of 0.95 leading to 0.95 lagging. In this case, the use of the DPWM1 would result in the switching losses reduction up to 45% compared to that of the continuous space vector modulation [38]. B. Voltage Harmonic Distortion As a result of the interleaved carriers, the pole voltages (measured with respect to the dc-link midpoint O in Fig. 1) of the VSC2 are phase shifted by the interleaving angle with respect to that of the VSC1. The pole voltages of phase A of two interleaved VSCs are shown in Fig. 3. The resultant switched voltage is an average of the individual pole voltages. The difference between the average of the pole voltages and the grid voltage (VA,avg − VA,g ) appears across the line filter, whereas the difference in the pole voltages (VA10 − VA20 ) is the potential across the circulating current filter Lc . The equivalent circuit of the hth harmonic component with two parallel interleaved VSCs is shown in Fig. 4. The harmonic components in the grid current depend on the magnitude of the individual harmonic components in the average pole voltage and the line filter admittance. Therefore, the magnitude of the individual harmonics components of the average pole voltage

4



f (t) =

A00 X + [A0n cos(n[ω0 t + θ0 ]) + B0n sin(n[ω0 t + θ0 ])] 2 n=1 + +

∞ X

[Am0 cos(m[ωc t + θc ]) + Bm0 sin(m[ωc t + θc ])]

m=1 ∞ X

∞ X

(5)

[Amn cos(m[ωc t + θc ] + n[ω0 t + θ0 ]) + Bmn sin(m[ωc t + θc ] + n[ω0 t + θ0 ])]

m=1 n=−∞ n6=0



qπ π π nπ π 3 Jn (q  2 3M ) cos( 6 ) sin[(m + n) 2 ] cos( 2 ) 1 + 2n sin( nπ m) π2 ] − cos(nπ) sin[(q − m) π2 ] |n 6 ) sin[(q + 





  6= 0      √  1  nπ nπ π π π + n sin( 6 ) cos( 3 )J0 (q 2 3M ) sin[(q + m) 2 ] cos(nπ) − sin[(q − m) 2 ] |n 6= 0   ∞ √ P 1   π π π   + 3M ) sin[(n + k) J (q ] cos[(2n + k) ] k n+k 2 6 6  4Vdc  k=1   × Amn1 = k6=−n   2   qπ   π π cos[(n + k)π] sin[(k + q + m) 2 ] + sin[(k − q + m) 2 ]     ∞ √   P 1 π π π   + J (q 3M ) sin[(n − k) ] cos[(2n − k) ] k n−k 2 6 6   k=1      k6=n  cos[(n − k)π] sin[(k + q + m) π2 ] + sin[(k − q + m) π2 ] √   qπ π π nπ mπ nπ 3 Jn (q 2 3M ) cos( 6 ) cos( 2 ) sin( 2 ) cos( 2 ) √ + 1 sin( nπ ) sin( qπ ) cos( mπ )[1 − cos(nπ)][1 − 2 cos( nπ )J0 (q π 3M )]|n 6= 0 6 2 2 3 2   2n ∞ √ P   1 π π mπ π   + J (q 3M ) sin[(n + k) ] cos( ) cos[(2n + k) ] k n+k 2 6 2 6   k=1   k6 = −n     4Vdc   π π Amn, avg = ×   cos[(n + k)π] sin[(k + q) ] + sin[(k − q) ] 2 qπ 2 2   ∞ √   P π mπ π 1 π   + J (q ] cos( ) cos[(2n − k) ] 3M ) sin[(n − k) n−k k 2 6 2 6   k=1   k6=n     π π cos[(n − k)π] sin[(k + q) 2 ] + sin[(k − q) 2 ]

(6)

(7)

where Vdc is the dc-link voltage, M is the modulation index, and q = m + n(ω0 /ωc ).

Ih,1 Ih,2 Vh,1 ∠φh,1

Vh,2 ∠φh,2

Ih

Ih,g jhω0 Lf

jhω0 Lg

1 jhω0 Ct

jhω0 Lt

1 jhω0 Cf

Fig. 4. The equivalent circuit of the hth harmonic with two parallel interleaved VSCs (h 6= 1).

is derived hereafter. As a result of the modulation, the pole voltages have undesirable harmonic components in addition to the desired fundamental component. This harmonic components can be represented as the summation series of sinusoids [36], characterized by the carrier index variable m and the baseband index variable n as shown in (5). The hth harmonic component is defined in terms of m and n, and it is given as ωc h = m( ) + n (8) ω0

where ω0 is the fundamental frequency and ωc is the carrier frequency. The harmonic coefficients Amn and Bmn in (5) are evaluated for each 60◦ sextant using the double Fourier integral. The closed form theoretical harmonic solution for the first VSC for asymmetrical regular sampled DPWM1 is evaluated and given in (6). The coefficients in (6) contains Jy (z), which represents the Bessel functions of the first kind of the order y and argument z. The carrier signal for the second VSC is phase shifted by an interleaving angle of 180◦ . The theoretical harmonic solution for the second VSC is also evaluated. The magnitude of the individual harmonic components is the same in both of the VSCs. However, some of the harmonic components in the pole voltage of VSC2 are in phase opposition to that of the VSC1. As a result, these harmonic components do not appear in the harmonic spectra of the average pole voltage. The theoretical closed form harmonic solution of the average pole voltage is given by (7) and the harmonic spectrum for the modulation index M = 0.95 is also depicted in Fig. 5(b). The double summation term in (5) is the ensemble of all possible frequencies, formed by taking the sum and the

5

Due to the interleaved carriers, this current further increases. Therefore, the switch currents Ix,1 and Ix,2 have the following two distinct components: 1) The component contributing to the resultant line current 2) The circulating current and the switch current can be given as

Harmonic magnitude (pu)

100

10−1

10−2

Ix,1 = Ix1 + Ix,c

10−3

Ix,2 = Ix2 − Ix,c 10−4

0

50

100 Harmonic order

150

200

(a)

Harmonic magnitude (pu)

100

where, x = phase [A, B, C]. Ix1 and Ix2 are the components of the switch currents contributing to the resultant line current and Ix,c is the circulating current. By neglecting the effect of the hardware and the control asymmetries, the line current is assumed to be shared equally between the VSCs (Ix1 = Ix2 ). From (9), the circulating current can be given as Ix,1 − Ix,2 (10) 2 and the dynamic behavior of the circulating current can be described as dIx,c Vx1O − Vx2O = (11) dt Lc

10−1

Ix,c =

10−2

10−3

10−4

(9)

0

50

100 Harmonic order

150

200

(b) Fig. 5. Theoretical harmonic spectrum with the modulation index m = 0.95 and pulse ratio ωc /ω0 = 51. (a) Harmonic spectrum of the pole voltage of the individual VSC, (b) Harmonic spectrum of the average pole voltage of the interleaved VSCs with an interleaving angle of 180◦ .

difference between the carrier harmonics, the fundamental waveform and its associated baseband harmonics [36]. Careful examination of (7) reveals that the cos( mπ 2 ) term appears as a multiplication factor in each summation term. As a result, the harmonic coefficients in (7) are zero for all the odd multiple of the carrier index variable m. Therefore, the side band harmonics around the odd multiple of the carrier harmonic frequencies are reduced. This is evident from Fig. 5(b), where the pulse ratio is ωc /ω0 =51. The magnitude of the harmonic components around the 51th harmonic and its odd multiple is reduced considerably compared to that of the individual VSC, as shown in Fig. 5. Also the magnitude of all even harmonic components is negligible. This happens due to the presence of the sin( nπ 2 ) as a multiplication term in the nth order Bessel function, as given in (7). C. Switch Current Ripple The switch current ripple influences the design of both the passive and the active components. Therefore, the maximum value of the peak-to-peak switch current ripple for interleaved VSCs is derived in this subsection. Due to the phase symmetry, only the current through the semiconductor devices of phase A is analyzed. Even when the carriers are not interleaved, small circulating current flows due to the hardware and control asymmetries.

where Lc is the inductance offered to the circulating current. A CI is used as a circulating current filter due to its effectiveness in suppressing the circulating current. The CI is constructed without introducing any intentional air gap in the magnetic flux path. As a result, it offers high inductance to the circulating current and thus the contribution of the circulating current towards the switch current can be neglected. This assumption is also verified by the experimental studies given in section V. The resultant current Ix is assumed to be shared equally between the VSCs and by neglecting the contribution of the circulating current, the switch current is given as Ix 2 (12) Ix,f ∆Ix u + 2 2 where Ix,f is the fundamental frequency component of the line current and the ∆Ix is the ripple current. Ix,1 = Ix,2 u

D. Ripple Component of the Resultant Line Current ∆Ix The switch current ripple is half of the ripple component of the resultant line current ∆Ix and the relationship between the ∆Ix and Lf is derived in this sub-section. In the interest of brevity, following assumptions are made: 1) The grid voltage is assumed to be free from the harmonic distortions. 2) The fundamental component of the switch current is assumed to be in phase with the fundamental component of the reference voltage. The reference space voltage vector is synthesized using the discrete voltage vectors such that the volt-second balance is maintained. The difference between the applied voltage vector and the reference space vector is known as the error voltage vector, and it is illustrated in Fig. 6. The harmonic flux vector is a time integral of this error voltage vector, and it

6

q

→ − V 2 (110)

→ − V 0 (000) → − V 7 (111)

→ − V ref → − V err,Z ψ

Ix,g (s)

Ix (s)

→ − V err,2

sLg

sLf d

1 sCt

Vx,avg (s)

→ − V err,1

Vx,g (s) 1 sC

→ − V 1 (100)

sLt

Fig. 6. The active and the zero vectors to synthesize a given reference vector and corresponding error voltage vectors. Fig. 8. The single phase equivalent circuit of the LCL filter with additional LC trap branch. VSC1 T7 T1 T1 VSC2 T1 T7 T7 VSC2: d-axis ripple VSC1: d-axis ripple

T7 T1 r1

r,tr ap

d-axis

Average of the d-axis ripple of the individual VSCs Fig. 7. d-axis component of the harmonic flux ripple over a carrier cycle of two parallel VSCs and their average. The interleaving angle is 180◦ and reference space vector angle ψ = 0◦ .

Filt er admit t ance (S)

r2 0

10

-20 dB/ decade

t

10

-60 dB/ decade

5

Trap lt er Proposed lt er wit h simpli ed t ransfer funct ion Proposed lt er wit h damping Proposed lt er, considering t he ESR of all t he component s 2

is directly proportional to the ripple current [39]–[41]. For the parallel interleaved VSCs, the flux linkage in the converterside inductor Lf is the average of the harmonic flux vectors of the individual VSCs. The harmonic flux vector can be decomposed into d-axis and q-axis components. For the unity power factor operation, the switch current ripple for phase A becomes maximum for the reference space vector angle ψ = 0◦ . At this instant, the ripple current of phase A can be obtained by only evaluating the d-axis component of the harmonic flux vector, and it is given as − → V derr,1 T1 = 23 Vdc [cos ψ − 34 M ]T1 (13a) − → 3 2 ◦ (13b) V derr,2 T2 = 3 Vdc [cos(60 − ψ) − 4 M ]T2 − → (13c) V derr,z Tz = − 12 Vdc M Tz where T1 , T2 and Tz are the dwell time of voltage vectors − → − → − → − → V1 , V2 , and V0 /V7 , respectively. The d-axis component of the harmonic flux ripple for individual VSCs and their average flux ripple for ψ = 0◦ are depicted in Fig. 7. The peak-to-peak value of the resultant d-axis harmonic flux for ψ = 0◦ is given as λd(pp) =

Vdc (1 − 34 M )( 32 M − 1) 3fc

(14)

This is equal to the peak-to-peak value of the flux linkage in the Lf and the peak-to-peak current ripple in the Ix is given as Vdc (1 − 43 M )( 23 M − 1) ∆Ix(pp) = (15) 3fc Lf Considering an equal current sharing between the VSCs, the peak-to-peak value of the switch current ripple is half of the ∆Ix(pp) . From (15), it is evident that the switch current ripple

10

3

10

4

10

Frequency (Hz)

5

10

Fig. 9. The variation of the magnitude of the admittance transfer function of the line filter with frequency.

is the function of a dc-link voltage Vdc , the modulation index M , and the switching frequency fc . For the given Vdc and fc , the peak-to-peak value of the switch current ripple is maximum for the modulation index of M = 1, and it is given as Vdc ∆Ix1(pp,max) = (16) 48fc Lf Once the desired maximum value of the switch current is chosen, the minimum value of the converter side inductance Lf,min can be obtained using (16). III. L INE F ILTER The line filter arrangement for the parallel interleaved VSCs is shown in Fig. 1 and its single phase equivalent circuit is also depicted in Fig. 8. The converter side inductor Lf , the grid side inductor Lg , and the capacitor Cf forms the LCL filter. The series connection of the Lt and Ct forms the LC trap branch. The Lf and Lg are designed to carry the rated current and the Equivalent Series Resistance (ESR) of these inductors are normally small [42] compared to the Lt and its effect in the low frequency region (upto 9 kHz) can be neglected for the filter design. The admittance transfer function of the filter (only considering the ESR of the LC trap branch) is given by (17). The resonant frequencies of the complex conjugate poles are given by (18). The complex conjugate zeros are also introduced due to the presence of the LC trap branch, and it

6

10

7

Ix,g (s) Vx,avg (s) ωr1

ωr2

 = Vg =0

1 Lf Lg C

s(s2 +

ωr1 Qr1 s

+

(17)

2 ) + ωr2

v u   s  1 u 1 1 1 1 2(Ct − C) 1 t =√ + − + + 2 2 2 LC Lt Ceq LC L Lt Ct Lt Ceq 2 v s u    1 u 1 1 1 1 2(Ct − C) 1 t =√ + + + + 2 2 2 LC Lt Ceq LC L Lt Ct Lt Ceq 2

where L =

is given as

ωt 2 Qt s + ωt 2 )(s2 + ωr2 s ωr1 Qr2

s2 +



1 ωt = √ Lt Ct

The quality factors are given as r 1 Lt Qt = Rt Ct 2 2 1 1 (ωr2 − ωr1 ) Qr1 = 2 2 Rt Ct ωr1 (ωr2 − ωt ) 2 2 1 1 (ωr2 − ωr1 ) Qr2 = 2 2 Rt Ct ωr2 (ωt − ωr1 )

(18)

Lf Lg CCt , and Ceq = Lf + Lg C + Ct

TABLE I BASE VALUES FOR PER - UNIT SYSTEM

(20)

(21)

where Rt is the ESR of the LC trap branch. The variation of the magnitude of the admittance transfer function of the line filter with respect to the frequency is depicted in Fig. 9. The magnitude of the simplified admittance transfer function closely matches with magnitude of the actual filter transfer function (considering the ESR of all the filter components) in the low frequency region, as shown in Fig. 9. The effect of the additional LC trap branch is evident in the vicinity of the frequency of 2fc , as shown in Fig. 9. The magnitude of the admittance transfer function of the trap filter proposed in [27], [28] is also plotted in Fig. 9 for comparison. Due to the presence of the capacitive branch C, the line filter offers a good attenuation to the high frequency components. Therefore, it can effectively reduce the differential mode electromagnetic interference (above 150 kHz). However, the additional pole pairs with a resonant frequency ωr2 are present in the proposed filter, as shown in Fig. 9. The value of the resonant frequency ωr1 of the proposed filter is slightly less than that of the trap filter ωr,trap and it is important to incorporate necessary damping to avoid amplification of the harmonic components, present in close proximity of ωr1 . The parallel Rd /Cd branch is used to provide necessary damping at ωr1 . However, the introduction of the damping branch slightly reduces the attenuation offered to the high frequency harmonic components, as shown in Fig. 9. IV. F ILTER D ESIGN The filter is designed for a 2.2 MVA WECS system shown in Fig. 1. The WECS is connected to a medium voltage network using a step-up transformer. The leakage inductance

(19)

Parameters Power Voltage Current Frequency Inductance Capacitance

Base Values (analysis) 2.2 MVA (2 MW) 690 V 1840 A 50 Hz 688 µH 14709 µF

Base Values (experiments) 11 kVA (10 kW) 400 V 15.87 A 50 Hz 46 mH 218 µF

of a step-up transformer often ranges from 0.04-0.06 pu [35], and it is considered as a part of the grid side inductance Lg . The analysis and the design methodology are also verified by performing experiments on a small scale (11 kVA) laboratory setup. The base values for both of the systems are given in Table I. The filter design constraints and the step-by-step design procedure are given in this section. A. Design Constraints 1) Harmonic Current Injection Limits: The harmonic current injection limit for a generator connected to the mediumvoltage network, specified by the German Association of Energy and Water Industries (BDEW) [5], [26], [43], is considered in this paper. The permissible harmonic current injection is determined by the apparent power of the WECS and the Short-Circuit Ratio (SCR) at the Point of the Common Coupling (PCC). The maximum current injection limit of the individual harmonic components up to 9 kHz is specified in the standard and the limits for the WECS connected to the 10 KV medium-voltage network are given in Table II. Special limits are set for the odd-ordered integer harmonics below the 25th harmonic, as given in Table II. The SCR is taken to be 20 and the allowable injection limits of individual harmonic components on the low voltage side (690 V) for the 2.2 MVA WECS are calculated. The calculated current injection limits for the individual harmonic components are shown in Fig. 10. 2) Maximum Switch Current Ripple: The controllability of the system is affected if the switch current has a high ripple content [6]. Therefore, the maximum value of the peak-to-peak switch current ripple is restricted to 0.45 pu in this design.

8

100

Harmonic current limit (A)

Harmonic Order h 5 7 11 13 17 19 23 25 Even-ordered h < 40 40 < h < 180

101

Current Injection Limit (A/MVA/SCR) 0.058 0.082 0.052 0.038 0.022 0.018 0.012 0.01 0.06 / h 0.18 / h

Harmonic magnitude (pu)

TABLE II BDEW HARMONIC CURRENT INJECTION LIMITS FOR THE WECS CONNECTED TO THE 10 KV M EDIUM VOLTAGE N ETWORK

M = 0.975 M = 1.025 M = 1.075 VVHS

10−1

10−2

10−3

10−4

0

50

100 Harmonic order

150

Fig. 11. The magnitude of the individual voltage harmonic component of the average pole voltage.

design of the line filter can be carried out independently. The interleaved operation of the parallel VSCs partially or completely eliminates some of the voltage harmonic components in the average of the phase voltages of the interleaved 10−1 20 40 60 80 100 120 140 160 180 legs. Therefore, the reduction in the value of the line filter components can also be achieved. A step-by-step design Harmonic order procedure for the proposed line filter is illustrated in this subFig. 10. BDEW [5] harmonic current injection limits for 2.2 MVA WECS section. on the low voltage side of the transformer with SCR=20. 1) Virtual Voltage Harmonics: The magnitude of the individual harmonic components in the injected grid current is 3) Reactive Power Consumption: The current flowing the multiplication of the magnitude of the respective harmonic through the semiconductor devices, the converter side filter component in the averaged pole voltage and the admittance inductor Lf and the circulating current filter Lc can be offered by the filter at that harmonic frequency. The theoretical minimized by limiting the current drawn by the shunt branches harmonic solution of the Vx,avg can be obtained using (7). of the line filter. Moreover, when VSCs are modulated using From (7), it is evident that the harmonic coefficients are the DPWM1, the switching losses increase with the increase in function of the dc-link voltage Vdc and the modulation index the phase difference between the reference voltage and the M . Therefore, for a given value of the dc-link voltage, the fundamental component of the switch current. Therefore, the magnitude of the individual harmonic components varies with switching losses can also be minimized by making the reactive the modulation index M . The magnitudes of the individpower consumption of the line filter as small as possible. The ual voltage harmonic component of Vx,avg for the different grid voltage may vary over a range of 1±0.1 pu and the modulation indices are shown in Fig. 11. In order to satisfy reactive power consumption of the shunt branches of the line the harmonic current injection limit over the entire operating filter is restricted to 0.05 pu for the maximum grid voltage of range, the worst case magnitude of the individual harmonic components of Vx,avg is required. The spectrum comprises 1.1 pu. the maximum values of the individual voltage harmonic components over the entire operating range and it is defined as a B. Filter Design Procedure Virtual Voltage Harmonic Spectrum (VVHS) [26]. The value of the line filter components are mainly deterVVHS for the considered modulation range and the maxmined based on: imum value of the dc-link voltage is calculated and it is 1) The individual voltage harmonic components that appear depicted in Fig. 11. The magnitude of most of the harmonic across the line filter. components (except those harmonic components, which are 2) The maximum value of the switch current ripple. present around the even multiple of the carrier harmonic) The magnitude of the individual harmonic frequency compo- increases as the modulation index approaches the lower limit. nents that appears across the line filter is determined by the On the other hand, the harmonic components around the even difference of the magnitude of the corresponding harmonic multiple of carrier frequency harmonic increases with increase frequency component in the average of the phase voltages in the modulation index, as shown in Fig. 11. of the parallel interleaved legs and the magnitude of the 2) Required Filter Admittance: The worst case filter adsame harmonic frequency component in the grid voltage. The mittance requirement is obtained from the harmonic current average of the phase voltages of the parallel interleaved legs injection limit and the VVHS of the phase voltage. The is independent of the arrangement of the CI. Therefore, the required admittance for the hth harmonic component is given 100

9

as ∗ Ih,BDEW = Vh,V V HS

(22)

∗ Ih,BDEW

where is the BDEW current injection limit of the hth harmonic component and Vh,V V HS is the voltage magnitude of the corresponding harmonic component in VVHS of the phase voltage. The VVHS of the average pole voltages comprises a common mode component in all phase, which gets canceled out in the line-to-line output voltage. The VVHS of the phase voltages is obtained by removing this common mode component from the VVHS of average pole voltages. 3) Selection of the LC Trap Branch Parameters: As a result of the interleaved carriers with an interleaving angle of 180◦ , the magnitude of the harmonic components around the odd multiple of the carrier frequency is reduced considerably. Therefore, the major voltage harmonic components appear around the 2nd carrier frequency harmonic (2fc ), as shown in Fig. 11. The line filter should offer small admittance to these harmonic components, which can be achieved by tuning the LC trap branch, such that the resonant frequency ωt is equal to 2fc . The resonant frequency of the LC trap branch is given by (20). The attenuation offered by the filter to the base band harmonics of the 2nd carrier frequency harmonic depends on the quality factor of the LC trap branch, given by (21). The magnitude of the voltage harmonic components in vicinity of the 2nd carrier frequency harmonic increases with increase in the modulation index, as shown in Fig. 11. Therefore, the required value of the quality factor of the LC trap branch strongly depends on the maximum operating value of the modulation index M . The capacitors are available in standard values and the selection of the values of the Lt and Ct to realize the required value of the quality factor is driven by the availability of the capacitor. The value of Ct is chosen to be 0.02 pu in this design. The value of Lt is taken to be 0.0048 pu in order to have the resonant frequency of the trap branch at twice the switching frequency. The quality factor of the trap branch is 25, which is sufficient to achieve the required attenuation around the 2nd carrier frequency harmonics. 4) Selection of Lf , Lg and C: As a result of an interleaved carrier, the voltage magnitude of the odd multiple of the carrier harmonics and its side bands is reduced considerably, as shown in Fig. 11. The proposed line filter introduces a resonance at ωr1 and ωr2 . The damping requirement can be reduced by choosing the filter parameters such that the resonances occur at the frequencies where the magnitude of the voltage harmonics are small. The values of ωr1 and ωr2 are chosen to be 2.05 kHz and 7.65 kHz, respectively. Once the values of ωt , ωr1 , and ωr2 are decided, the Qr1 and Qr2 are obtained using (21). From these values, the Ceq is calculated, which is given as Ceq =

1 1 Lt ω 2 + ω 2 + ωr1 ωr2 − r1 r2 Qr1 Qr2

Required filter admittance α = 2, Lf + Lg = 0.055 pu α = 1.25, 5 : Lf + Lg = 0.086 pu α = 1.14, 8 : Lf + Lg = 0.126 pu

102

2 ω2 ωr1 r2 ωt2

(23)

Admittance (S)

Yh∗

101 100 10−1 10−2 0

50

100 Harmonic order

150

Fig. 12. Filter admittance plot for different values of α.

For the given values of the ωt , ωr1 , and ωr2 , the product of L and C is given as LC =

ωt2 2 2 ωr1 ωr2

(24)

As the value of Ct is already fixed, the value of C can be obtained using (19) and (23). The desired value of the L can be achieved by selecting the proper values of Lf and Lg . Many possible combinations of Lf and Lg exist. Let, Lg = αL

(25)

where α is a constant, and it is greater than one. Using (19) and (25), Lf can be given as  α  Lf = L (26) α−1 For the given range of grid voltage variation, the maximum value of the dc-link voltage, which is required to ensure the VSC operation in a linear modulation range, is decided by the value of the inductance (Lf + Lg ). Therefore, Lf + Lg should be made as small as possible. The minimum value of Lf + Lg can be obtained by selecting α = 2, where the values of Lf and Lg are equal. However, from a cost point of view, this combination may not be optimal. For α > 2, the value of Lg is more than the value of Lf . The reverse is true for 1 6 α 6 2. The value of α = 2 is taken as the starting point. In case a harmonic injection limit is violated, the design is discarded and a new value of the α will be selected. The maximum value of the α is limited by the switch current ripple, and it is given as αmax =

1 1−

48Lfc ∆Ix1(pp,max) Vdc

(27)

In case a harmonic injection limit is violated even with αmax , the design is discarded and new design will be evaluated by changing the parameters of the LC trap branch. The filter admittance plot for different values of α is shown in Fig. 12. As mentioned earlier, appropriate damping is required to avoid amplification of the harmonic components around ωr1 and ωr2 . Therefore, a Cd /Rd branch has been added. The capacitive branch is split into two separate branches and a

10

Ix (s)

C = Cf + Cd

Ix,g (s) sLg

1 sCt

Vx,avg (s)

1 sCf

1 sCd

sLt

Admittance (S)

sLf

Required filter admittance Designed filter Grid impedance = 0.025 pu Grid impedance = 0.05 pu Grid impedance = 0.075 pu

102

Vg (s)

Rd

101 100 10−1 10−2

Fig. 13. The single phase equivalent circuit of the LCL filter with additional LC trap and a Cd /Rd damping branch.

Frequency (kHz)

0

50

100 Harmonic order

150

Fig. 15. Admittance plot of the designed filter. The effect of the grid inductance variation is also depicted.

20 ωr1 ωr2

15

10−3

Ix

Lf

Ix,g

Lg

10 Rd 5 0

Vx,avg 0

0.2

0.4

0.6

Cf

Vx,g Cd

0.8

β Fig. 14. Worst case variation in the resonant frequencies as a function of β.

resistor is inserted in one of the branches, as shown in Fig. 13. Let, Cd = βC Cf + Cd = C

(28)

The introduction of the Cd /Rd damping branch changes the resonant frequencies ωr1 and ωr2 . The worst case change in the resonant frequency can be obtained by setting Rd = ∞ [44]. The worst case variation in the resonant frequencies as a function of β is shown in Fig. 14. The ωr1 varies in a small range, whereas the variation in ωr2 is more and increases sharply as β approaches one. For a given value of Rd , the losses in the damping branch and admittance offered to the high frequency components also increase as β approaches one. In order to restrict the variation in the resonant frequencies in a narrow range and to reduce the inventory [25], β is taken to be 0.5. The Cd /Rd damping branch introduces an additional zero (z = −1/Cd Rd ) and a pole (p = z/γ and γ < 1) in the admittance transfer function of the line filter. The value of γ can be obtained by solving the denominator polynomial, as given in the Appendix. Considering the complexity involved in solving the quintic function, only the information of the additional zero is used to obtain the minimum value of the damping resistor Rd,min . Once Rd,min is obtained, the required value of the damping resistor Rd is determined by using the frequency response characteristic of the filter admittance transfer function given in the Appendix. The improved resonance damping can be achieved by selecting Rd and Cd such that the |z| < ωr1 [44]. Using this relation, the minimum value of the required

Fig. 16. Single phase equivalent circuit of the LCL filter with parallel Rd /Cd damping branch.

damping resistor Rd,min can be obtained, and it is given as Rd,min =

1 ωr1 Cd

(29)

The line filter is designed by following the above mentioned procedure. The final filter parameters are given in Table IV and the its admittance plot is also depicted in Fig. 15. The effect of the line impedance (Lgrid ) variation on the filter performance is also shown. The value of ωr1 reduces slightly with the increase in the grid impedance, whereas the ωt remains unaltered. 5) Comparison with the LCL Filter: Reduction in the value of the filter components is achieved using the proposed high order filter. This has been verified by comparing the values of the filter components of the proposed filter with that of the LCL filter. The single phase equivalent circuit of the LCL filter with the parallel Rd /Cd damping branch is shown in Fig. 16. Lf is the converter side inductor, Lg is the grid side inductor, and Cf is the filter capacitor. The parameters of the damping branch are chosen as per the procedure specified in [6]. The admittance transfer function of the LCL filter is given by (1). The value of the filter components of the LCL filter is chosen such that the filter admittance is less than the required value of the filter admittance for the harmonic frequency components upto 9 kHz (as per the BDEW limits). The admittance plot of the LCL filter along with the required filter admittance is shown in Fig. 17. The values of the filter components of the designed LCL filter are given in Table III, along with the filter parameters of the proposed filter. The total shunt capacitance (Cf + Cd + Ct )

11

TABLE III F ILTER PARAMETERS OF THE PROPOSED FILTER AND THE LCL FILTER Parameters Lf + Lg Capacitor Trap inductor Lt

Required filter admittance Admittance of the designed LCL filter

Admittance (S)

102

LCL filter 106.75 µH (0.155 pu) (Cf + Cd ) 2400 µF (0.16 pu) -

Proposed filter 61.92 µH (0.09 pu) (Cf + Cd + Ct ) 566 µF (0.0386 pu) 3.3 µH (0.0048 pu)

TABLE IV PARAMETERS FOR SIMULATION AND EXPERIMENTAL STUDY

101 Parameters Power Switching frequency AC voltage (line-to-line) DC-link voltage Lf Lg (+ Transformer leakage) Trap capacitor Ct Trap inductor Lt Capacitor Cf = Cd

100 10−1 10−2 10−3

0

50

100 Harmonic order

150

Simulation study 2.2 MVA (2 MW) 2.55 kHz 690 V 1080 V 13.76 µH (0.02 pu) 48.16 µH (0.07 pu) 294 µF (0.02 pu) 3.3 µH (0.0048 pu) 136 µF (0.0093 pu)

Experiment 11 kVA (10 kW) 2.55 kHz 400 V 650 V 0.87 mH (0.019 pu) 3.1 mH (0.0675 pu) 4.4 µF (0.02 pu) 220 µH (0.0048 pu) 2 µF (0.0093 pu)

Fig. 17. Admittance plot of the designed LCL filter, with Lf = 0.065 pu (44.75 µH), Lg = 0.09 pu (62 µH), Cf = 0.08 pu (1200 µF), Cd = 0.08 pu (1200 µF). 1

Vg

0.5π/T 0.6π/T

0.8

Ig∗

+ −

V ∗ G (s) d

GPI (s)

− +

Gf (s)

0.4π/T

0.1

0.7π/T

Ig

0.3π/T

0.2 0.3

0.6

0.8π/T

Root Loci Designed filter Grid impedance = 0.025 pu Grid impedance = 0.05 pu Grid impedance = 0.075 pu Grid impedance = 0.1 pu 0.2π/T

0.4 0.5

0.4

0.6 0.7 0.9π/T

0.1π/T 0.8

0.2

Fig. 18. Grid current controller structure.

0

in the proposed filter is 0.0386 pu, against the 0.16 pu in the LCL filter. The reduction in the value of the shunt capacitor improves the efficiency, as shunt capacitors draws reactive current and increases resistive losses. In addition, it also increases switching losses when the VSCs are modulated using the DPWM1 scheme. The use of the proposed line filter result in 42 % reduction in the values of the series inductors (Lf + Lg ). This reduces the volume of the inductive components, as inductors Lf and Lg are designed to carry the rated value of the current and occupy significant amount of space. The proposed line filter requires an additional trap inductor Lt = 0.0048 pu. However, the value of Lt is very small. In addition, Lt is placed in the shunt branch and carries small current. Therefore, the volume of this additional inductor is small compared to the reduction achieved in Lf and Lg . C. Controller Design The grid current is controlled using the Proportional-Integral (PI) controller, as shown Fig. 18. The control variables are transformed to a synchronously rotating frame, which rotates at the fundamental frequency of the grid voltage. The transfer function of the PI controller is given by GPI (s) = Kp +

Ki s

(30)

0.9

1π/T 1π/T

−0.2 0.9π/T

0.1π/T

−0.4 0.8π/T

−0.6

0.2π/T

0.7π/T

−0.8

0.3π/T

0.6π/T

0.4π/T 0.5π/T

−1 −1

−0.8

−0.6

−0.4

−0.2

0

0.2

0.4

0.6

0.8

1

Fig. 19. Root loci of the closed loop system with the designed controller. The closed loop poles are marked using ’x’.

where Ki is the integral gain and the Kp is the proportional gain of the PI controller. The control and PWM delay is represented by the Gd (s). The transfer function of the filter Gf (s) is given in the Appendix. The parameters of the designed filter are given in Table IV. The continuous transfer functions are discretized and the controller parameters are calculated in the discrete time domain using the root locus theory. The controller is designed to have a damping factor of 0.707. The parameters of the PI controller to meet the given damping factor requirement are Kp = 0.168 and Ki = 1310. Fig. 19 shows the root locus in the z-plane of the closed-loop

12

Current (A)

2000

IA,g IB,g IC,g

IA,1 (A)

3000

1000 0

1500 1000 500 0 -500 -1000 -1500

-1000

-3000

0.06

0.07

0.08

0.09

0.1 0.11 Time (s)

0.12

0.13

0.14

IA,c (A)

-2000

Fig. 20. Step response of the controller. The d-axis current reference is changed from 0.5 pu to 1 pu at t = 0.1 s.

V. S IMULATION AND E XPERIMENTAL R ESULTS

0.33

0.34

0.3

0.31

0.32 (b)

0.33

0.34

0.3

0.31

0.32 (c)

0.33

0.34

0.3

0.31

0.32 (d)

0.33

0.34

0.3

0.31

0.32 (e)

0.33

0.34

0.3

0.31

0.32 (f)

0.33

0.34

500 0 -500

Current (A)

-1000

IA,g (A)

The simulations have been carried out using the PLECS simulation tool. The parameters used for the simulation study are given in Table IV. The controller behavior to the step change in the reference signal is shown in Fig. 20. The d-axis current reference is changed from 0.5 pu to 1 pu. The grid current tracks the reference and transient performance is also found to be satisfactory. Fig. 21, shows the simulated waveforms of the system, operating under rated conditions with the unity power factor operation. The harmonic spectrum of the simulated grid current is obtained by using fast Fourier transform (FFT) and plotted along with the BDEW harmonic current injection limit in Fig. 22. The major harmonic components around the 2nd carrier harmonic frequency are effectively suppressed. All harmonic components are within the specified harmonic current injection limits.

0.32 (a)

1000

The simulation study and the experimental verification is carried out to verify the analysis and the design methodology and the results are presented in this section. A. Simulation Study

0.31

IA (A)

3000 2000 1000 0 -1000 -2000 -3000

Current (A)

system with the designed controller parameters. The pole map of the closed-loop system for varying values of the grid side inductance Lg is also shown in Fig. 19, where Lg is the summation of the leakage inductance of the stepup transformer and the line inductance Lgrid (inductance of the electrical network between the PCC and the source). The value of the Lg is varied from 0.07 pu to 0.17 pu. With the increase in the value of the Lg , the damping factor decreases from 0.707 to 0.5. However, the system remains stable with the designed PI controller, as evident from Fig. 19.

30 20 10 0 -10 -20 -30

0.3

600 400 200 0 -200 -400 -600

3000 2000 1000 0 -1000 -2000 -3000

Fig. 21. Simulated currents of phase A with asymmetrical regular sampled DPWM1 with an interleaving angle of 180◦ . (a) VSC1: Phase A current, (b) Circulating current, (c) Resultant current, (d) Current in LC trap branch, (e) Current through the Cf , (f) Grid current.

B. Experimental Results To verify the analysis and the design methodology, a line filter for a small scale (11 kVA) laboratory prototype with two interleaved VSCs was designed. The parameters of the line filter used in this setup are listed in Table IV. In order to avoid the effect of the background harmonics present in the grid voltage, an AC power source MX-35 from the California Instruments is used as a harmonic free grid emulator. The grid impedance is taken to be Zgrid =0.04 pu. The control

is implemented using TMS320F28346 floating-point digital signal processor. A 0.6 mH, three phase inductor is used as a converter side inductor. The circulating current filter LC has a leakage inductance of 0.27 mH. Therefore, the total converter side inductance Lf = 0.87 mH (0.019 pu). A three phase, 10 kVA, 1:1 transformer is used. The leakage inductance of this

13

TABLE V M AGNITUDE OF THE CHARACTERISTIC HARMONICS WITH THE TRANSFORMER AND WITH EQUIVALENT INDUCTOR Harmonic With transformer With eq. inductor

5th 294 mA 112 mA

7th 310 mA 77 mA

11th 67 mA 12 mA

13th 43 mA 32 mA

17th 20 mA 20 mA

19th 26 mA 17 mA

23rd 18 mA 12 mA

25th 19 mA 18 mA

102 BDEW harmonic current limits Harmonic components in grid current

Current (A)

101

IA,1 (10 A/div.)

IA,2 (10 A/div.)

100

IA,c (2.5 A/div.) 10−1 10−2 10−3

0

50

100 Harmonic order

150

IA (20 A/div.)

Fig. 22. Performance verification of the line filter. The harmonic spectrum of the simulated grid current is depicted.

(a) LC trap branch current (5 A/div.)

transformer is measured to be 3.1 mH (0.0675 pu), which is nearly equal to the required value of the 0.07 pu. Therefore, Lg is comprised of the leakage inductance of the transformer only and an additional inductor is avoided. The experiment was performed at rated conditions with unity power factor operation. Fig. 23, shows the experimental waveforms. The circulating current is effectively suppressed by using CI, as shown in Fig. 23(a). As a result, the effect of the circulating current in the individual VSC currents can be conveniently neglected. Therefore IA,1 ≈ IA,2 and the sum of these two currents (IA ) is also shown in Fig. 23(a). The maximum value of the switch current ripple is 0.4 pu against the design constraint of 0.45 pu. The current through the LC trap branch and the capacitive branch Cf is shown in Fig. 23(b). The LC trap branch provides low impedance path to the 2nd carrier frequency harmonic and its side bands. Whereas, the capacitive branch Cf sinks the high frequency harmonic components. The injected current and voltage at the PCC are also shown in Fig. 23(b). The measured grid current had a THD of 3.1 % and the magnitude of the individual harmonic component is plotted in Fig. 24. The magnitude of all the harmonic frequency components of the grid current is lower than the specified BDEW harmonic current injection limits. The major harmonics components around the 2nd carrier harmonic are suppressed effectively and the magnitude of these components are also within the prescribed current injection limits. The relative amplitude of the harmonic components in the low frequency range is more in the measured grid current than on the simulated grid current. The even order harmonics are mainly present due to the asymmetrical three limb structure of the inductor Lf and the transformer (Lg ). The transformer also draws nonlinear magnetizing current and increases the magnitude of the odd

Current through Cf (5 A/div.)

IA,g (25 A/div.)

VA,g (500 V/div.)

(b) Fig. 23. The experimental results. (a) Ch1: VSC1 phase A current (IA,1 ), Ch2: VSC2 phase A current (IA,2 ), Ch3: Circulating current (IA,c ), Ch4: Resultant current (IA ), (b) Ch1: Current through the LC trap branch, Ch2: Current through the Cf branch, Ch3: Grid current (IA,g ), Ch4: Grid voltage at PCC.

order harmonics as well. To validate the filter performance, the experiment was also performed by replacing the transformer with a 3.1 mH, three limb inductor. The grid impedance is also set to zero. The grid current waveform is shown in Fig. 25 and the measured grid current had a THD of 1.38 %. The magnitude of the low order odd harmonic components present in the grid current is given in Table V and it is compared with the magnitude of the corresponding harmonic components of a grid current with a transformer. The magnitude of the low order harmonic components is significantly smaller with the equivalent inductor than that with the transformer. Therefore, it is concluded that the magnetizing current of the transformer significantly contributes towards the low order odd harmonic

14

10−1

approach can be equally applicable to other PWM schemes as well. The performance of the filter has been tested. The magnitude of the individual harmonic components in the grid current is within the harmonic current injection limits, specified by the BDEW standards.

10−2

VII. A PPENDIX

101

BDEW harmonic current limits (11 kVA) Measured grid current harmonics

Current (A)

100

10−3 10−4

0

20

40

60

80 100 120 Harmonic order

140

160

Considering the single phase equivalent circuit of the proposed filter, as shown in Fig. 13, the admittance transfer of the filter is given as 180 s3 + A2 s2 + A1 s + A0 Ix,g (s) =G 5 Vx,avg (s) s(s + B4 s4 + B3 s3 + B2 s2 + B1 s + B0 ) Vg =0

Fig. 24. Performance verification of the line filter of the laboratory prototype. LC trap branch current (5 A/div.)

Current through Cf (5 A/div.)

where  G= A0 = A2 =

IA,g (25 A/div.)

B0 = VA,g (500 V/div.)

B2 = B3 = B4 =

Fig. 25. The experimental results obtained by replacing transformer with equivalent three phase inductor. Ch1: Current through the LC trap branch, Ch2: Current through the Cf branch, Ch3: Grid current (IA,g ), Ch4: Grid voltage.

components of the grid current.

 1 Lf Lg Cf 1 1 Rt , A1 = + Lf Ct Cd Rd Lt Ct Lt C d Rd 1 Rt + Lt Cd Rd Lf + Lg Lf + Lg  1 Rt  , B1 = + , Lf Lg Lt Ct Cf Cd Rd Lf Lg Lt Cf Ct C d Rd Lf + Lg  Rt 1  Cf + Cd + Ct + + Lf Lg Cf Lt Cd Rd Lt Cf Ct Cd Rd Cf + Ct Rt (Cf + Cd ) Lf + Lg + + Lf Lg Cf Lt Cf Ct Lf Cf Cd Rd Rt Cf + Cd + Lt Cf Cd Rd (31) ACKNOWLEDGMENT

The authors would like to thank the Intelligent Efficient Power Electronics (IEPE) and the Center of Reliable Power Electronics (CORPE) for supporting the related research.

VI. C ONCLUSION A step-by-step design procedure of the line filter for the high power WECS is presented in this paper. In-depth analysis of the effect of the interleaved carriers on the harmonic performance of the parallel connected VSCs has been made. The closed form analytical harmonic solution for the two parallel interleaved VSCs, modulated by asymmetrical regular sampled DPWM1 scheme, is derived and the reduction in the magnitude of some of the harmonic components is demonstrated. The effect of the interleaved carriers on the switch current ripple is also analyzed. The set of the worst case individual voltage harmonic components in the entire operating range (VVHS) is derived, and it is used to obtain the required value of the filter admittance for each harmonic components. The additional LC trap branch with the conventional LCL filter is used. The characteristics of the proposed line filter is analyzed and the design procedure to select the filter parameters, such that the filter admittance closely matches with the required admittance at all concerned harmonic frequencies is presented. Although the design example presented in the paper considers DPWM1 as the modulation scheme, the proposed filter design

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Ghanshyamsinh Gohil (S’13) received the M.Tech. degree in electrical engineering with specialization in power electronics and power systems from the Indian Institute of Technology-Bombay, Mumbai, India, in 2011. He is currently working towards the Ph.D. degree at the Department of Energy Technology, Aalborg University, Denmark. Prior to joining the Ph.D. studies, he was employed at Siemens Corporate Research, Bangalore. His research interests include parallel operation of voltage source converters, pulsewidth modulation techniques and the design of the inductive power components.

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Lorand Bede (S’11) was born in Romania in 1989. He received the engineering degree in electrical engineering from Sapientia Hungarian University of Transilvania, Trgu Mure, Romania, 2011,the MSc. degree in Power Electronics and Drives from Aalborg University, Aalborg, Denmark, in2013. Currently he is a PhD Fellow at the Departmen t of Energy Technology, at Aalborg University,Aalborg. His research interest include grid connected applications based on parallel interleaved converters for wind turbine applications.

Remus Teodorescu (S’94-A’97-M’99-SM’02-F’12) received the Dipl.Ing. degree in electrical engineering from Polytechnical University of Bucharest, Romania in 1989, and PhD. degree in power electronics from University of Galati, Romania, in 1994. In 1998, he joined Aalborg University, Department of Energy Technology, power electronics section where he currently works as full professor. Since 2013 he is a visiting professor at Chalmers University. He has coauthored the book Grid Converters for Photovoltaic and Wind Power Systems, ISBN: 9780-470-05751-3, Wiley 2011 and over 200 IEEE journals and conference papers. His areas of interests includes: design and control of grid-connected converters for photovoltaic and wind power systems, HVDC/FACTS based on MMC, SiC-based converters, storage systems for utility based on Li-Ion battery technology. He was the coordinator of the Vestas Power Program 2008 2013.

Tamas Kerekes (S’06-M’09) obtained his Electrical Engineer diploma in 2002 from Technical University of Cluj, Romania, with specialization in Electric Drives and Robots. In 2005, he graduated the Master of Science program at Aalborg University, Institute of Energy Technology in the field of Power Electronics and Drives. In Sep. 2009 he obtained the PhD degree from the Institute of Energy Technology, Aalborg University. The topic of the PhD program was: ”Analysis and modeling of transformerless PV inverter systems”. He is currently employed as an Associate professor and is doing research at the same institute within the field of grid connected renewable applications. His research interest include grid connected applications based on DC-DC, DC-AC single- and three-phase converter topologies focusing also on switching and conduction loss modeling and minimization in case of Si and new wide-bandgap devices.

Frede Blaabjerg (S’86-M’88-SM’97-F’03) was with ABB-Scandia, Randers, Denmark, from 1987 to 1988. From 1988 to 1992, he was a Ph.D. Student with Aalborg University, Aalborg, Denmark. He became an Assistant Professor in 1992, an Associate Professor in 1996, and a Full Professor of power electronics and drives in 1998. His current research interests include power electronics and its applications such as in wind turbines, PV systems, reliability, harmonics and adjustable speed drives. He has received 15 IEEE Prize Paper Awards, the IEEE PELS Distinguished Service Award in 2009, the EPE-PEMC Council Award in 2010, the IEEE William E. Newell Power Electronics Award 2014 and the Villum Kann Rasmussen Research Award 2014. He was an Editor-inChief of the IEEE TRANSACTIONS ON POWER ELECTRONICS from 2006 to 2012. He has been Distinguished Lecturer for the IEEE Power Electronics Society from 2005 to 2007 and for the IEEE Industry Applications Society from 2010 to 2011. He is nominated in 2014 by Thomson Reuters to be between the most 250 cited researchers in Engineering in the world.